Name |
gthe3_common_simmodel.txt |
gthe3_common_wiz_wrapper.txt |
gthe3_common_wiz_wrapped.txt |
gthe4_common_simmodel.txt |
gthe4_common_wiz_wrapper.txt |
gthe4_common_wiz_wrapped.txt |
gthe4_common_wiz_jesd_wrapped.txt |
AEN_QPLL0_FBDIV
| |
|
|
1'b1 |
1'b1 |
1'b1 |
1'b1 |
AEN_QPLL1_FBDIV
| |
|
|
1'b1 |
1'b1 |
1'b1 |
1'b1 |
AEN_SDM0TOGGLE
| |
|
|
1'b0 |
1'b0 |
1'b0 |
1'b0 |
AEN_SDM1TOGGLE
| |
|
|
1'b0 |
1'b0 |
1'b0 |
1'b0 |
A_SDM0TOGGLE
| |
|
|
1'b0 |
1'b0 |
1'b0 |
1'b0 |
A_SDM1DATA_HIGH
| |
|
|
9'b000000000 |
9'b000000000 |
9'b000000000 |
9'b000000000 |
A_SDM1DATA_LOW
| |
|
|
16'b0000000000000000 |
16'b0000000000000000 |
16'b0000000000000000 |
16'b0000000000000000 |
A_SDM1TOGGLE
| |
|
|
1'b0 |
1'b0 |
1'b0 |
1'b0 |
BIAS_CFG0
| 16'h0000 |
16'h0000 |
16'b0000000000000000 |
16'h0000 |
16'h0000 |
16'b0000000000000000 |
16'b0000000000000000 |
BIAS_CFG1
| 16'h0000 |
16'h0000 |
16'b0000000000000000 |
16'h0000 |
16'h0000 |
16'b0000000000000000 |
16'b0000000000000000 |
BIAS_CFG2
| 16'h0000 |
16'h0000 |
16'b0000000000000000 |
16'h0000 |
16'h0000 |
16'b0000000100100100 |
16'b0000000100100100 |
BIAS_CFG3
| 16'h0040 |
16'h0040 |
16'b0000000001000000 |
16'h0000 |
16'h0000 |
16'b0000000001000001 |
16'b0000000001000001 |
BIAS_CFG4
| 16'h0000 |
16'h0000 |
16'b0000000000000000 |
16'h0000 |
16'h0000 |
16'b0000000000010000 |
16'b0000000000010000 |
BIAS_CFG_RSVD
| 10'b0000000000 |
10'b0000000000 |
10'b0000000000 |
16'h0000 |
16'h0000 |
16'b0000000000000000 |
16'b0000000000000000 |
COMMON_CFG0
| 16'h0000 |
16'h0000 |
16'b0000000000000000 |
16'h0000 |
16'h0000 |
16'b0000000000000000 |
16'b0000000000000000 |
COMMON_CFG1
| 16'h0000 |
16'h0000 |
16'b0000000000000000 |
16'h0000 |
16'h0000 |
16'b0000000000000000 |
16'b0000000000000000 |
POR_CFG
| 16'h0004 |
16'h0004 |
16'b0000000000000100 |
16'h0000 |
16'h0000 |
16'b0000000000000000 |
16'b0000000000000000 |
PPF0_CFG
| |
|
|
16'h0F00 |
16'h0F00 |
16'b0000011000000000 |
16'b0000011000000000 |
PPF1_CFG
| |
|
|
16'h0F00 |
16'h0F00 |
16'b0000011000000000 |
16'b0000011000000000 |
QPLL0CLKOUT_RATE
| |
|
|
"FULL" |
"FULL" |
"HALF" |
"HALF" |
QPLL0_CFG0
| 16'h3018 |
16'h3018 |
16'b0011001000011100 |
16'h391C |
16'h391C |
16'b0011001100011100 |
16'b0011001100011100 |
QPLL0_CFG1
| 16'h0000 |
16'h0000 |
16'b0001000000011000 |
16'h0000 |
16'h0000 |
16'b1101000000111000 |
16'b1101000000111000 |
QPLL0_CFG1_G3
| 16'h0020 |
16'h0020 |
16'b0001000000011000 |
16'h0020 |
16'h0020 |
16'b1101000000111000 |
16'b1101000000111000 |
QPLL0_CFG2
| 16'h0000 |
16'h0000 |
16'b0000000001001000 |
16'h0F80 |
16'h0F80 |
16'b1000011111000000 |
16'b1000011111000000 |
QPLL0_CFG2_G3
| 16'h0000 |
16'h0000 |
16'b0000000001001000 |
16'h0F80 |
16'h0F80 |
16'b1000011111000000 |
16'b1000011111000000 |
QPLL0_CFG3
| 16'h0120 |
16'h0120 |
16'b0000000100100000 |
16'h0120 |
16'h0120 |
16'b0000000100100000 |
16'b0000000100100000 |
QPLL0_CFG4
| 16'h0009 |
16'h0009 |
16'b0000000000001001 |
16'h0002 |
16'h0002 |
16'b0000000000000011 |
16'b0000000000000011 |
QPLL0_CP
| 10'b0000011111 |
10'b0000011111 |
10'b0111111111 |
10'b0000011111 |
10'b0000011111 |
10'b0011111111 |
10'b0011111111 |
QPLL0_CP_G3
| 10'b0000011111 |
10'b0000011111 |
10'b1111111111 |
10'b0000011111 |
10'b0000011111 |
10'b0000001111 |
10'b0000001111 |
QPLL0_FBDIV
| 66 |
66 |
160 |
66 |
66 |
160 |
160 |
QPLL0_FBDIV_G3
| 80 |
80 |
80 |
80 |
80 |
160 |
160 |
QPLL0_INIT_CFG0
| 16'h0000 |
16'h0000 |
16'b0000001010110010 |
16'h0000 |
16'h0000 |
16'b0000001010110010 |
16'b0000001010110010 |
QPLL0_INIT_CFG1
| 8'h00 |
8'h00 |
8'b00000000 |
8'h00 |
8'h00 |
8'b00000000 |
8'b00000000 |
QPLL0_LOCK_CFG
| 16'h01E8 |
16'h01E8 |
16'b0010000111101000 |
16'h01E8 |
16'h01E8 |
16'b0010010111101000 |
16'b0010010111101000 |
QPLL0_LOCK_CFG_G3
| 16'h01E8 |
16'h01E8 |
16'b0010000111101000 |
16'h21E8 |
16'h21E8 |
16'b0010010111101000 |
16'b0010010111101000 |
QPLL0_LPF
| 10'b1111111111 |
10'b1111111111 |
10'b1111111100 |
10'b1011111111 |
10'b1011111111 |
10'b1000011111 |
10'b1000011111 |
QPLL0_LPF_G3
| 10'b1111111111 |
10'b1111111111 |
10'b0000010101 |
10'b1111111111 |
10'b1111111111 |
10'b0111010101 |
10'b0111010101 |
QPLL0_PCI_EN
| |
|
|
1'b0 |
1'b0 |
1'b0 |
1'b0 |
QPLL0_RATE_SW_USE_DRP
| |
|
|
1'b0 |
1'b0 |
1'b1 |
1'b1 |
QPLL0_REFCLK_DIV
| 2 |
2 |
1 |
1 |
1 |
1 |
1 |
QPLL0_SDM_CFG0
| 16'b0000000000000000 |
16'b0000000001000000 |
16'b0000000000000000 |
16'h0040 |
16'h0040 |
16'b0000000010000000 |
16'b0000000010000000 |
QPLL0_SDM_CFG1
| 16'b0000000000000000 |
16'b0000000000000000 |
16'b0000000000000000 |
16'h0000 |
16'h0000 |
16'b0000000000000000 |
16'b0000000000000000 |
QPLL0_SDM_CFG2
| 16'b0000000000000000 |
16'b0000000000000000 |
16'b0000000000000000 |
16'h0000 |
16'h0000 |
16'b0000000000000000 |
16'b0000000000000000 |
QPLL1CLKOUT_RATE
| |
|
|
"FULL" |
"FULL" |
"HALF" |
"HALF" |
QPLL1_CFG0
| 16'h3018 |
16'h3018 |
16'b0011001000011100 |
16'h691C |
16'h691C |
16'b0011001100011100 |
16'b0011001100011100 |
QPLL1_CFG1
| 16'h0000 |
16'h0000 |
16'b0001000000011000 |
16'h0020 |
16'h0020 |
16'b1101000000111000 |
16'b1101000000111000 |
QPLL1_CFG1_G3
| 16'h0020 |
16'h0020 |
16'b0001000000011000 |
16'h0020 |
16'h0020 |
16'b1101000000111000 |
16'b1101000000111000 |
QPLL1_CFG2
| 16'h0000 |
16'h0000 |
16'b0000000001000000 |
16'h0F80 |
16'h0F80 |
16'b0000111111000011 |
16'b0000111111000011 |
QPLL1_CFG2_G3
| 16'h0000 |
16'h0000 |
16'b0000000001000000 |
16'h0F80 |
16'h0F80 |
16'b0000111111000011 |
16'b0000111111000011 |
QPLL1_CFG3
| 16'h0120 |
16'h0120 |
16'b0000000100100000 |
16'h0120 |
16'h0120 |
16'b0000000100100000 |
16'b0000000100100000 |
QPLL1_CFG4
| 16'h0009 |
16'h0009 |
16'b0000000000001001 |
16'h0002 |
16'h0002 |
16'b0000000000000011 |
16'b0000000000000011 |
QPLL1_CP
| 10'b0000011111 |
10'b0000011111 |
10'b0001111111 |
10'b0000011111 |
10'b0000011111 |
10'b0011111111 |
10'b0011111111 |
QPLL1_CP_G3
| 10'b0000011111 |
10'b0000011111 |
10'b1111111111 |
10'b0000011111 |
10'b0000011111 |
10'b0001111111 |
10'b0001111111 |
QPLL1_FBDIV
| 66 |
66 |
66 |
66 |
66 |
66 |
66 |
QPLL1_FBDIV_G3
| 80 |
80 |
80 |
80 |
80 |
80 |
80 |
QPLL1_INIT_CFG0
| 16'h0000 |
16'h0000 |
16'b0000001010110010 |
16'h0000 |
16'h0000 |
16'b0000001010110010 |
16'b0000001010110010 |
QPLL1_INIT_CFG1
| 8'h00 |
8'h00 |
8'b00000000 |
8'h00 |
8'h00 |
8'b00000000 |
8'b00000000 |
QPLL1_LOCK_CFG
| 16'h01E8 |
16'h01E8 |
16'b0010000111101000 |
16'h01E8 |
16'h01E8 |
16'b0010010111101000 |
16'b0010010111101000 |
QPLL1_LOCK_CFG_G3
| 16'h21E8 |
16'h21E8 |
16'b0010000111101000 |
16'h21E8 |
16'h21E8 |
16'b0010010111101000 |
16'b0010010111101000 |
QPLL1_LPF
| 10'b1111111111 |
10'b1111111111 |
10'b1111111100 |
10'b1011111111 |
10'b1011111111 |
10'b1000011111 |
10'b1000011111 |
QPLL1_LPF_G3
| 10'b1111111111 |
10'b1111111111 |
10'b0000010101 |
10'b1111111111 |
10'b1111111111 |
10'b0111010100 |
10'b0111010100 |
QPLL1_PCI_EN
| |
|
|
1'b0 |
1'b0 |
1'b0 |
1'b0 |
QPLL1_RATE_SW_USE_DRP
| |
|
|
1'b0 |
1'b0 |
1'b1 |
1'b1 |
QPLL1_REFCLK_DIV
| 2 |
2 |
1 |
1 |
1 |
1 |
1 |
QPLL1_SDM_CFG0
| 16'b0000000000000000 |
16'b0000000001000000 |
16'b0000000000000000 |
16'h0000 |
16'h0000 |
16'b0000000010000000 |
16'b0000000010000000 |
QPLL1_SDM_CFG1
| 16'b0000000000000000 |
16'b0000000000000000 |
16'b0000000000000000 |
16'h0000 |
16'h0000 |
16'b0000000000000000 |
16'b0000000000000000 |
QPLL1_SDM_CFG2
| 16'b0000000000000000 |
16'b0000000000000000 |
16'b0000000000000000 |
16'h0000 |
16'h0000 |
16'b0000000000000000 |
16'b0000000000000000 |
RSVD_ATTR0
| 16'h0000 |
16'h0000 |
16'b0000000000000000 |
16'h0000 |
16'h0000 |
16'b0000000000000000 |
16'b0000000000000000 |
RSVD_ATTR1
| 16'h0000 |
16'h0000 |
16'b0000000000000000 |
16'h0000 |
16'h0000 |
16'b0000000000000000 |
16'b0000000000000000 |
RSVD_ATTR2
| 16'h0000 |
16'h0000 |
16'b0000000000000000 |
16'h0000 |
16'h0000 |
16'b0000000000000000 |
16'b0000000000000000 |
RSVD_ATTR3
| 16'h0000 |
16'h0000 |
16'b0000000000000000 |
16'h0000 |
16'h0000 |
16'b0000000000000000 |
16'b0000000000000000 |
RXRECCLKOUT0_SEL
| 2'b00 |
2'b00 |
2'b00 |
2'b00 |
2'b00 |
2'b00 |
2'b00 |
RXRECCLKOUT1_SEL
| 2'b00 |
2'b00 |
2'b00 |
2'b00 |
2'b00 |
2'b00 |
2'b00 |
SARC_EN
| 1'b1 |
1'b1 |
1'b1 |
|
|
|
|
SARC_ENB
| |
|
|
1'b0 |
1'b0 |
1'b0 |
1'b0 |
SARC_SEL
| 1'b0 |
1'b0 |
1'b0 |
1'b0 |
1'b0 |
1'b0 |
1'b0 |
SDM0DATA1_0
| 16'b0000000000000000 |
16'b0000000000000000 |
16'b0000000000000000 |
|
|
|
|
SDM0DATA1_1
| 9'b000000000 |
9'b000000000 |
9'b000000000 |
|
|
|
|
SDM0INITSEED0_0
| 16'b0000000000000000 |
16'b0000000000000000 |
16'b0000000000000000 |
16'b0000000000000000 |
16'b0000000000000000 |
16'b0000000100010001 |
16'b0000000100010001 |
SDM0INITSEED0_1
| 9'b000000000 |
9'b000000000 |
9'b000000000 |
9'b000000000 |
9'b000000000 |
9'b000010001 |
9'b000010001 |
SDM0_DATA_PIN_SEL
| 1'b0 |
1'b0 |
1'b0 |
|
|
|
|
SDM0_WIDTH_PIN_SEL
| 1'b0 |
1'b0 |
1'b0 |
|
|
|
|
SDM1DATA1_0
| 16'b0000000000000000 |
16'b0000000000000000 |
16'b0000000000000000 |
|
|
|
|
SDM1DATA1_1
| 9'b000000000 |
9'b000000000 |
9'b000000000 |
|
|
|
|
SDM1INITSEED0_0
| 16'b0000000000000000 |
16'b0000000000000000 |
16'b0000000000000000 |
16'b0000000000000000 |
16'b0000000000000000 |
16'b0000000100010001 |
16'b0000000100010001 |
SDM1INITSEED0_1
| 9'b000000000 |
9'b000000000 |
9'b000000000 |
9'b000000000 |
9'b000000000 |
9'b000010001 |
9'b000010001 |
SDM1_DATA_PIN_SEL
| 1'b0 |
1'b0 |
1'b0 |
|
|
|
|
SDM1_WIDTH_PIN_SEL
| 1'b0 |
1'b0 |
1'b0 |
|
|
|
|
SIM_DEVICE
| |
|
|
"ULTRASCALE_PLUS" |
"ULTRASCALE_PLUS" |
"ULTRASCALE_PLUS" |
"ULTRASCALE_PLUS" |
SIM_MODE
| "FAST" |
|
|
"FAST" |
"FAST" |
"FAST" |
"FAST" |
SIM_RESET_SPEEDUP
| "TRUE" |
"TRUE" |
"TRUE" |
"TRUE" |
"TRUE" |
"TRUE" |
"TRUE" |
SIM_VERSION
| 2 |
2 |
2 |
|
|
|
|