digraph G {
rankdir=LR;
IDLE [label="IDLE\nlu_fsm_idle()"]
WAIT_IMEISV [label="WAIT_IMEISV\nlu_fsm_wait_imeisv()"]
WAIT_PVLR [label="WAIT_PVLR\nlu_fsm_wait_pvlr()"]
WAIT_AUTH [label="WAIT_AUTH\nlu_fsm_wait_auth()"]
WAIT_CIPH [label="WAIT_CIPH\nlu_fsm_wait_ciph()"]
WAIT_IMSI [label="WAIT_IMSI\nlu_fsm_wait_imsi()"]
WAIT_HLR_UPD [label="WAIT_HLR_UPD\nlu_fsm_wait_hlr_ul_res()"]
WAIT_LU_COMPL [label="WAIT_LU_COMPL\nlu_fsm_wait_lu_compl()"]
WAIT_LU_COMPL_STANDALONE [label="WAIT_LU_COMPL_STANDALONE\nlu_fsm_wait_lu_compl_standalone()"]
DONE [label="DONE"]
vlr_loc_upd_node1 [label="vlr_loc_upd_node1()",shape=box]
vlr_loc_upd_node_b [label="vlr_loc_upd_node_b()",shape=box]
_lu_fsm_done [label="_lu_fsm_done()",shape=box]
vlr_loc_upd_node_4 [label="vlr_loc_upd_node_4()",shape=box]
_start_lu_main [label="_start_lu_main()",shape=box]
vlr_loc_upd_post_auth [label="vlr_loc_upd_post_auth()",shape=box]
vlr_loc_upd_want_imsi [label="vlr_loc_upd_want_imsi()",shape=box]
vlr_loc_update [label="vlr_loc_update()",shape=box]
vlr_subscr_rx_ciph_res [label="vlr_subscr_rx_ciph_res()",shape=box]
vlr_subscr_handle_lu_res [label="vlr_subscr_handle_lu_res()",shape=box]
vlr_subscr_handle_lu_err [label="vlr_subscr_handle_lu_err()",shape=box]
vlr_subscr_rx_tmsi_reall_compl [label="vlr_subscr_rx_tmsi_reall_compl()",shape=box]
vlr_auth_fsm_c_vlr_auth_fsm_VLR_Authenticate [label="vlr_auth_fsm.c vlr_auth_fsm VLR_Authenticate",shape=box3d]
vlr_lu_fsm_c_upd_hlr_vlr_fsm_upd_hlr_vlr_fsm [label="vlr_lu_fsm.c upd_hlr_vlr_fsm upd_hlr_vlr_fsm",shape=box3d]
vlr_lu_fsm_c_lu_compl_vlr_fsm_lu_compl_vlr_fsm [label="vlr_lu_fsm.c lu_compl_vlr_fsm lu_compl_vlr_fsm",shape=box3d]
vlr_access_req_fsm_c_proc_arq_vlr_fsm_Process_Access_Request_VLR [label="vlr_access_req_fsm_c_proc_arq_vlr_fsm_Process_Access_Request_VLR",shape=box3d]
IDLE->WAIT_IMEISV [label="-"]
IDLE->WAIT_PVLR [label="-"]
IDLE->WAIT_IMSI [label="-"]
IDLE->WAIT_AUTH [label="-"]
IDLE->WAIT_HLR_UPD [label="-"]
IDLE->DONE [label="-"]
IDLE->_start_lu_main [label="-",style=dotted]
WAIT_IMEISV->WAIT_PVLR [label="-"]
WAIT_IMEISV->WAIT_IMSI [label="-"]
WAIT_IMEISV->WAIT_AUTH [label="-"]
WAIT_IMEISV->WAIT_HLR_UPD [label="-"]
WAIT_IMEISV->DONE [label="-"]
WAIT_IMEISV->_start_lu_main [label="-",style=dotted]
WAIT_PVLR->WAIT_IMSI [label="-"]
WAIT_PVLR->WAIT_AUTH [label="-"]
WAIT_PVLR->DONE [label="-"]
WAIT_PVLR->vlr_loc_upd_node1 [label="-",style=dotted]
WAIT_PVLR->vlr_loc_upd_want_imsi [label="-",style=dotted]
WAIT_AUTH->WAIT_CIPH [label="-"]
WAIT_AUTH->WAIT_LU_COMPL [label="-"]
WAIT_AUTH->WAIT_HLR_UPD [label="-"]
WAIT_AUTH->DONE [label="-"]
WAIT_AUTH->vlr_loc_upd_post_auth [label="-",style=dotted]
WAIT_CIPH->WAIT_LU_COMPL [label="-"]
WAIT_CIPH->WAIT_HLR_UPD [label="-"]
WAIT_CIPH->DONE [label="-"]
WAIT_IMSI->WAIT_AUTH [label="-"]
WAIT_IMSI->WAIT_HLR_UPD [label="-"]
WAIT_IMSI->DONE [label="-"]
WAIT_IMSI->vlr_loc_upd_node1 [label="-",style=dotted]
WAIT_HLR_UPD->WAIT_LU_COMPL [label="UPD_HLR_COMPL"]
WAIT_HLR_UPD->WAIT_LU_COMPL_STANDALONE [label="UPD_HLR_COMPL"]
WAIT_HLR_UPD->DONE [label="-"]
WAIT_HLR_UPD->vlr_lu_fsm_c_upd_hlr_vlr_fsm_upd_hlr_vlr_fsm [label="-",style=dotted]
WAIT_HLR_UPD->vlr_lu_fsm_c_lu_compl_vlr_fsm_lu_compl_vlr_fsm [label="-",style=dotted]
WAIT_LU_COMPL->DONE [label="-"]
WAIT_LU_COMPL->vlr_lu_fsm_c_lu_compl_vlr_fsm_lu_compl_vlr_fsm [label="-",style=dotted]
WAIT_LU_COMPL_STANDALONE->DONE [label="-"]
WAIT_LU_COMPL_STANDALONE->vlr_lu_fsm_c_lu_compl_vlr_fsm_lu_compl_vlr_fsm [label="-",style=dotted]
vlr_loc_upd_node1->WAIT_AUTH [label="-",style=dotted]
vlr_loc_upd_node1->vlr_loc_upd_post_auth [label="-",style=dotted]
vlr_loc_upd_node1->vlr_auth_fsm_c_vlr_auth_fsm_VLR_Authenticate [label="-",style=dotted]
vlr_loc_upd_node_b->WAIT_LU_COMPL [label="-",style=dotted]
vlr_loc_upd_node_b->vlr_loc_upd_node_4 [label="-",style=dotted]
vlr_loc_upd_node_b->vlr_lu_fsm_c_lu_compl_vlr_fsm_lu_compl_vlr_fsm [label="-",style=dotted]
_lu_fsm_done->DONE [label="-",style=dotted]
vlr_loc_upd_node_4->WAIT_HLR_UPD [label="-",style=dotted]
vlr_loc_upd_node_4->vlr_lu_fsm_c_upd_hlr_vlr_fsm_upd_hlr_vlr_fsm [label="-",style=dotted]
_start_lu_main->WAIT_PVLR [label="-",style=dotted]
_start_lu_main->vlr_loc_upd_node1 [label="-",style=dotted]
_start_lu_main->vlr_loc_upd_want_imsi [label="-",style=dotted]
vlr_loc_upd_post_auth->WAIT_CIPH [label="-",style=dotted]
vlr_loc_upd_want_imsi->WAIT_IMSI [label="-",style=dotted]
vlr_loc_update->IDLE [label="UPDATE_LA",style=dotted,arrowhead=halfopen]
vlr_subscr_rx_ciph_res->WAIT_CIPH [label="CIPH_RES",style=dotted,arrowhead=halfopen]
vlr_subscr_rx_ciph_res->vlr_access_req_fsm_c_proc_arq_vlr_fsm_Process_Access_Request_VLR [label="-",style=dotted]
vlr_subscr_handle_lu_res->WAIT_HLR_UPD [label="HLR_LU_RES",style=dotted,arrowhead=halfopen]
vlr_subscr_handle_lu_err->WAIT_HLR_UPD [label="HLR_LU_RES",style=dotted,arrowhead=halfopen]
vlr_subscr_rx_tmsi_reall_compl->WAIT_LU_COMPL [label="NEW_TMSI_ACK",style=dotted,arrowhead=halfopen]
vlr_subscr_rx_tmsi_reall_compl->WAIT_LU_COMPL_STANDALONE [label="NEW_TMSI_ACK",style=dotted,arrowhead=halfopen]
vlr_subscr_rx_tmsi_reall_compl->vlr_access_req_fsm_c_proc_arq_vlr_fsm_Process_Access_Request_VLR [label="-",style=dotted]
vlr_access_req_fsm_c_proc_arq_vlr_fsm_Process_Access_Request_VLR->vlr_subscr_rx_ciph_res [label="-",style=dotted]
vlr_access_req_fsm_c_proc_arq_vlr_fsm_Process_Access_Request_VLR->vlr_subscr_rx_tmsi_reall_compl [label="-",style=dotted]
}